TSMC's transition to its N2 (2nm-class) process node has cleared the yield threshold that makes mass production economically viable. Internal reports and supply chain checks cited by DigiTimes and Nikkei Asia place N2 production yield at Fab 20 in Hsinchu at approximately 65% — above the 60% level that semiconductor manufacturers typically require before committing to volume production schedules.
The Apple A20 chip, which will power the iPhone 17 lineup expected in September 2026, has entered tape-out at TSMC's N2 facility. Tape-out marks the point where chip design is finalized and sent to the fabrication plant for first silicon production — typically 6-to-8 months before consumer device availability. Apple's early tape-out reflects its position as TSMC's anchor customer and gives it first access to N2 capacity.
The performance improvement over TSMC's N3 (3nm-class) process used in the A17 and M3 chips is approximately 10-15% better compute density at the same power budget, or equivalently, 25-30% lower power consumption at the same performance level. For the iPhone, the power efficiency gain translates to either longer battery life or headroom for more aggressive Neural Engine performance — both of which Apple will likely deploy.
TSMC's other tier-1 customer at N2 is expected to be Nvidia, which is reportedly planning to use the process for its next-generation AI inference chip following the Blackwell series. A single Nvidia data center chip at N2 contains approximately 160 billion transistors — a density that requires the Gate-All-Around transistor architecture that N2 introduces.
The geopolitical dimension: TSMC is simultaneously qualifying N2 at its Arizona Fab 21 facility, where US government funding from the CHIPS Act is contingent on achieving parity with Taiwan's production capabilities. Arizona N2 certification is expected by late 2026, though full volume production will trail Taiwan by 12-18 months.