The semiconductor industry's relentless march to smaller transistors has entered its most competitive phase yet. TSMC, Samsung, and Intel are all pursuing 2-nanometer-class process nodes that promise meaningful performance and efficiency gains over current 3nm chips — but the race is more than a technical achievement competition. It is a geopolitical and economic contest that will determine the balance of global chip manufacturing for the rest of the decade.
TSMC's N2 process, entering volume production in late 2025, is the current leading contender. Built around nanosheet transistors (also called gate-all-around, or GAA), N2 delivers approximately 10-15% higher performance and 25-30% better power efficiency compared to TSMC's N3E node at the same transistor count. Apple has secured priority allocation for N2 capacity for its A20 chip, expected in the iPhone 17 Pro line. Nvidia's next-generation Rubin GPU architecture is also slated for TSMC N2.
Samsung has been aggressively pushing its 2nm SF2 node, having announced it would begin risk production in 2025. The company claims performance competitive with TSMC N2, with particular focus on high-performance computing. Samsung's GAA implementation, which it began with its 3nm SF3 node, gives it a head start on the architecture compared to TSMC's later GAA adoption. However, Samsung's yields on advanced nodes have historically lagged TSMC, and early SF2 customer commitments have been cautious.
Intel's 18A node is the company's most ambitious technological bet in its comeback story. Intel claims 18A will be the most performant process available when it ships, using RibbonFET (Intel's GAA variant) combined with PowerVia, a backside power delivery architecture that routes power connections behind the chip rather than through the front. Backside power delivery reduces wiring congestion and allows tighter transistor packing. Several external customers have submitted test chip designs, and Intel has named Amazon Web Services and Microsoft as 18A manufacturing customers — a meaningful signal for a company that has historically manufactured only its own chips.
The geopolitical dimension adds urgency beyond competitive positioning. TSMC's dominance in advanced logic manufacturing has made Taiwan a focal point of US-China tensions, accelerating investment in geographic diversification. TSMC's Arizona fabs are targeting N3 initially, with N2 scheduled for the second fab currently under construction. Intel's US-based fabs serve as the government's preferred domestic advanced manufacturing option, supported by $8.5 billion in CHIPS Act grants. Samsung's Texas fab expansion is similarly incentivized.
For the technology industry broadly, the 2nm generation is when the cost per transistor reduction — which has driven Moore's Law economics for decades — becomes genuinely difficult to sustain. N2 chips will cost more to produce per wafer than N3, and the complexity of nanosheet transistors raises the bar for yield. The industry is not at the end of scaling, but the economics are changing in ways that will influence which products justify advanced node investment.